Accepted Papers
Alberto Battistello, Guido Marco Bertoni, Filippo Melzani and Maria Chiara Molteni. JWT Back to the future on the (ab)use of JWTs in IoT transactions
Asmita Adhikary, Abraham J. Basurto Becerra, Lejla Batina, Ileana Buhan, Durba Chatterjee, Senna van Hoek and Eloi Sanfelix Gonzalez. ARCHER: Architecture-Level Simulator for Side-Channel Analysis in RISC-V Processors
Arda Saygan, Muhammed Said Gündoğan, Atakan Arslan and Mehmet Emin Gönen. HAPPIER: Hash-based, Aggregatable, Practical Post-quantum signatures Implemented Efficiently with Risc0
Bardia Taghavi, Reza Azarderakhsh and Mehran Mozaffari Kermani. LightNTT: A High-Efficiency NTT/iNTT Core for ML-DSA Featuring a Constant-Geometry Pipelined Design
Charilaos Memeletzoglou, Evangelia Konstantopoulou and Nicolas Sklavos. On advancing pre-silicon Hardware Trojan detection against Lightweight Block Ciphers
Giuseppe Manzoni, Shekoufeh Neisarian and Elif Bilge Kavun. An Optimized FrodoKEM Implementation on Reconfigurable Hardware
Gökçe Düzyol and Kamil Otal. Leveraging Smaller Finite Fields for More Efficient ZK-Friendly Hash Functions
Lizzy Grootjen, Zhuoran Liu and Ileana Buhan. MIDSCAN: Investigating the portability problem for cross-device DL-SCA
Martin Feussner and Igor Semaev. Isotropic Quadratic Forms, Diophantine equations and Digital Signatures, DEFIv2
Mohammad Vaziri and Vesselin Velichkov. Cube-Attack-Like Cryptanalysis of Keccak-Based Constructions Exploiting State Differences
Mohammad Vaziri. Automated Tool for Meet-in-the-Middle Attacks with Very Low Data and Memory Complexity
Murat Burhan Ilter, Onur Koçak, Orhun Kara and Fatih Sulak. Differential and Linear Analyses of DIZY through MILP modeling
Rahul Magesh, Modini Ayyagari, Sharath Pendyala and Aydin Aysu. A Comparison of Unified Multiplier Designs for the FALCON Post-Quantum Digital Signature
Saeed Aghapour, Kasra Ahmadi, Reza Azarderakhsh and Mehran Mozaffari Kermani. Lightweight Fault Detection Architecture for Modular Exponentiation in Cryptography on ARM and FPGA
Subhadeep Banik and Francesco Regazzoni. Hardware Circuits for the Legendre PRF
Tolun Tosun, Selim Kırbıyık, Emre Koçer and Ersin Alaybeyoğlu. Optimized FPGA Architecture for Modular Reduction in NTT